Samsung Electronics unveiled its 'CUBE' (C.U.B.E) strategy, which vertically stacks memory semiconductors (hereinafter referred to as memory) to increase capacity and bandwidth while improving power and thermal efficiency. The company plans to maintain leadership in memory technology for the AI era through the development of HBM5 (8th-generation high-bandwidth memory) and next-generation 3D memory 'zHBM'.
According to the electronics industry on the 1st, Choi Jang-seok, Executive Vice President and Head of Product Planning Team at Samsung Electronics DS Division's Memory Lisa Business Unit, announced this CUBE strategy at 'SEMICON Taiwan 2026' held in Taipei, Taiwan on the 1st to overcome memory technology limits. The executive attended the 'Memory Executive Summit', a pre-event of 'SEMICON Taiwan'.
CUBE specifically refers to △Capacity (Capacity), △Optimization (Utilization), △Bandwidth (Bandwidth), and △Power/Thermal Efficiency (Efficiency). Samsung Electronics aims to strengthen its leadership in memory technology by simultaneously improving these four elements based on a 3D stacking structure.
First, regarding capacity, the company will vertically expand memory to overcome PCB (printed circuit board) area constraints. The conventional method of arranging memory chips on a flat plane requires larger board areas as capacity increases, but stacking chips vertically allows for greater capacity within the same area.
Samsung Electronics is also advancing memory optimization. Executive Vice President Choi stated, "3D is not simply about stacking; the key lies in how each layer is utilized," and explained, "We are optimizing logic and memory placement to eliminate data processing delays." The company plans to build a 'vertical highway' that reduces distances between dies, enabling faster data movement and significantly boosting memory bandwidth.
The strategy also addresses power and heat issues. Executive Vice President Choi emphasized, "The ultimate goal of 3D is to reduce the energy required to move a single bit of data," adding, "We are maximizing performance per watt by enhancing structural efficiency."
The CUBE strategy will also be applied to next-generation HBM products. Samsung Electronics has been advancing capacity, bandwidth, power efficiency, and thermal management technologies from HBM2 (2nd generation) through HBM4E (7th generation) up to HBM5. The developing HBM5 aims to double performance compared to HBM4E while reducing thermal resistance by 20%.
The next-generation 3D memory 'zHBM', whose concept was unveiled earlier this year, is expected to deliver eight times the general performance and three times the performance per watt compared to HBM4E. It focuses on reducing thermal resistance by 75–90% to resolve the performance limits and heat issues of existing HBM.
Samsung Electronics is also developing 'zNAND-O', a NAND flash based on 3D packaging. zNAND-O boasts a bit density ten times higher than DRAM, with read bandwidth and power efficiency seven times greater than conventional NAND. The company plans to supply samples of zNAND-O starting in 2028.
Leveraging its world-class production capacity, Samsung Electronics intends to respond to both HBM and general memory demand. Omdia estimates Samsung Electronics' DRAM production capacity this year at 8.175 million 300mm wafers annually, surpassing SK Hynix's 6.66 million and Micron's 3.66 million.
However, as major memory companies including Samsung Electronics concentrate resources on producing high-value-added products like HBM, the supply of general DRAM is expected to become increasingly tight. With no significant changes in production capacity, an increased share of HBM will reduce the available capacity for general DRAM production.
The industry views expanded HBM production as a key variable for DRAM supply and demand next year. Some analyses suggest that PC DRAM supply could contract next year. DRAM prices are also fluctuating. Market research firm TrendForce predicted that PC DRAM contract prices in the third quarter of this year would rise by 18–23% compared to the previous quarter.
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